• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A slope compensation unit of a control signal of a width modulated pulse generation module, comprising: a digital-to-analog converter for generating a decreasing sawtooth signal, and a circuit (2) for triggering the steps of the sawtooth signal and for resetting this signal, the sawtooth signal being reset to the rhythm of a first frequency of said width-modulated pulses.
    公开号:FR3066060A1
    申请号:FR1753897
    申请日:2017-05-03
    公开日:2018-11-09
    发明作者:Jean-Francois Link；Vincent Onde
    申请人:STMicroelectronics Rousset SAS；
    IPC主号:
    专利说明:

    CUT-OFF POWER CONTROL
    Field
    This description relates generally to electronic circuits and more particularly to the field of switching power supplies (SMPS). The present description applies more particularly to a digital-analog converter for slope compensation for controlling a switching power supply. The present description also relates to a programmable digital-analog converter and a programmable generator of a decreasing sawtooth signal.
    Presentation of the prior art
    In energy converters based on the principle of a switching power supply, the output voltage is controlled by a set value by modulating the pulse width of a control signal from a switch for cutting the energy transfer in an inductive element. In the embodiments referred to in this description, the control is digital and the width of the pulses is obtained from a current ramp whose value is compared to a threshold. In some cases, when the duty cycle of the command pulses reaches or is greater than 50%, the system becomes unstable.
    Certain known solutions use tables of values stored in the converter, which constitute particularly complex solutions. summary
    It would be desirable to have a slope compensation function for controlling a switching power supply.
    One embodiment overcomes all or part of the drawbacks of the switching switch control circuits of a switching power supply.
    One embodiment offers a solution particularly suitable for controlling a digital-analog converter for slope compensation.
    One embodiment provides a programmable digital analog converter.
    One embodiment provides a programmable generator of a decreasing sawtooth signal.
    Thus, one embodiment provides a slope compensation unit for a control signal of a module for generating width-modulated pulses, comprising: a digital-analog converter for generating a sawtooth signal; and a circuit for triggering the steps of the sawtooth signal and for resetting this signal, the signal being reset at the rate of a first frequency of said pulses modulated in width.
    According to one embodiment, the trigger circuit is a digital circuit.
    According to one embodiment, the triggering circuit comprises: at least one counter incremented at the rate of a second frequency, greater than a modulation frequency of said pulses; a first storage register of a value representative of the period of the first frequency; and a first comparator from the value of the counter to the value of the first register, said first comparator providing a signal for resetting the sawtooth signal.
    According to one embodiment, the triggering circuit further comprises: a second register whose value is incremented, at the rate of the second frequency, by an increment value; and a second comparator from the value of said counter to the value of the second register, said second comparator providing a signal for triggering a step of the sawtooth signal.
    According to one embodiment, the triggering circuit comprises a third register for storing the increment value.
    According to one embodiment, the sawtooth signal has a decreasing slope.
    According to one embodiment, the sawtooth signal has an increasing slope.
    One embodiment provides a control circuit for a switch of a switching power supply, comprising: a module for generating control pulses of said switch; a comparator for generating a trigger signal of said module from a comparison of information representative of the current level in an inductive element controlled by said switch with respect to a threshold; and a slope compensation unit.
    One embodiment provides a switching power supply circuit comprising: a switch for cutting an inductive energy transfer; and a control circuit.
    Brief description of the drawings
    These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments made without implied limitation in relation to the appended figures among which: FIG. 1 is a very schematic and partial representation of an example of architecture of a switching power supply of the type to which the described embodiments apply; FIG. 2 represents, in the form of blocks, an embodiment of a control circuit of a digital-analog converter for compensating the slope of a control current ramp of a switching switch; Figures 3A, 3B, 3C and 3D illustrate, by timing diagrams, the operation of the circuit of Figure 2; Figure 4 is a block diagram of an embodiment of a programmable digital to analog converter; and FIG. 5 represents, in the form of blocks, an embodiment of a digital stage of the generator of FIG. 4, adapted to produce a programmable generator of a decreasing sawtooth signal.
    detailed description
    The same elements have been designated by the same references in the different figures.
    For the sake of clarity, only the steps and elements useful for understanding the embodiments which will be described have been shown and will be detailed. In particular, the operation of a switching power supply and of the actual energy conversion has not been detailed, the embodiments described being compatible with the usual operation of a switching power supply.
    Unless otherwise specified, when reference is made to two elements connected to each other, this means directly connected without any intermediate element other than conductors, and when reference is made to two elements connected to each other, it means that these two elements can be directly connected (connected) or linked through one or more other elements.
    In the following description, when reference is made to the terms "approximately", "approximately" and, "on the order of", this means to the nearest 10%, preferably to the nearest 5%.
    Figure 1 is a schematic representation and in the form of blocks of an embodiment of a control circuit 1 for switching power supply of the type to which the embodiments described apply.
    Circuit 1 is intended to control a switch K (generally a MOS transistor) for cutting an inductive energy transfer. According to the embodiments, this switch is in parallel or in series with the inductive element and / or with a freewheeling diode (not shown). The switch K is controlled by a train of pulses of variable width, generally at fixed frequency (period T). The duty cycle of the pulses fixes the duration of the energy transfer according to the needs of the load in order to maintain a supply voltage of this load.
    The pulse train is supplied by a module 12 (PWM) for modulating the width of pulses generated at the frequency of a clock CK. The width of the pulses (the duty cycle) is controlled by the requirements of the load. These requirements are, for example, deduced from a measurement of the supply voltage of the load or from a measurement of the current in this load or in the inductive element. In both cases, information V (ILOAD), proportional to the energy required by the load, is measured and is supplied at the input of a comparator 14 which compares it to a threshold representing the desired voltage setpoint. The output of comparator 14 triggers the reset of the current ramp generated by the module 12, therefore the end of the pulse at each cycle.
    According to the embodiment shown, the comparison reference of the comparator 14 is not fixed but is provided by a slope compensation unit 18 (SCU - Slope Compensation Unit) comprising a digital-analog converter 16 (DAC) controlled by a circuit 2 for triggering (CTR) the step of decay of a sawtooth signal S16 generated by the converter 16. The role of the slope compensation unit 18 is to provide, as a reference signal, to the comparator 14, a slope opposite to the slope generated by the module 12. Thus, even in the event of a stable output voltage which would tend to cause instabilities in the signal P generated by the module 12, the reduction in the value serving as a reference avoids this instability.
    The role of trigger circuit 2 is to supply, to the digital-analog converter 16, a signal R for resetting the voltage ramp and a signal S for triggering a decrease in the value of the ramp. In other words, the signal R is a signal of the same frequency as the frequency of the pulses P generated by the module 12 and the signal S is a decrement or step signal of the converter 16.
    The trigger circuit 2 is a digital circuit, that is to say that it only processes digital signals and provides only digital signals.
    FIG. 2 is a block diagram of an embodiment of a trigger circuit 2 of a digital analog converter 16 of a slope compensation unit 18 of a control signal of a module 12 for generating d width modulated pulses.
    The reset signal R is generated by a comparison of a value CNT of a counter 21 (COUNTER), incremented at the rate of a clock CK ', with a value VAL representing the desired reset period. The VAL value is stored in a register 22 (REGI). At each period (for example at each rising edge) of the clock signal CK ′, the respective values VAL and CNT are compared by a comparator 23 whose output (signal R) switches when the value of the counter reaches the value VAL. The counter 21 is reset at each end of period T, that is to say, each time the output R switches to the high state. For this, the output of comparator 23 is connected to the reset input RST of counter 21.
    The signal S of decrement or of pitch of the current ramp generated by the converter 16 is supplied by a comparator 24 from the value CNT of the counter 21 to a value ACT supplied by a register 25 (REG2). The value contained in register 25 is incremented by an adder 26, by an increment value INC stored in a register 27 (REG3). The current ACT value, read in register 25, is increased by the value INC read in register 27 when the value CNT of counter 21 reaches the value ACT. The value ACT of register 25 is reset to the value of the INC increment at each period T. A selector 28 (two-to-one multiplexer) receives, on an input activated by the signal R, the value INC contained in register 27. At rest, the selector 28 selects the output of a selector 29 between the output of the adder 26 and the output of the register 25 (value ACT). The selector 29 is controlled by the signal S and selects the output of the adder 26 at each edge of the output S, that is to say at each INC increment step. Thus, the output S has an edge each time the counter 21 reaches an increment step corresponding to the value INC.
    According to a simplified embodiment, the increment value INC is the unit and the signal S is therefore incremented at each clock period CK '.
    Preferably, the values VAL and INC of the circuit 2 are programmable in number of periods of the clock CK ', which makes the circuit easily adaptable to different applications. In particular, the digital VAL value representing the period T of the pulses (the value VAL corresponds to the number of periods of the clock CK 'contained in a period T) is configurable. Just change the value loaded in register 22 (REGI). For this, the output of register 22 is for example connected to a first input of a selector 30 (two-to-one multiplexer). A second input of the multiplexer 30 is intended to receive the value VAL to be stored in the register 22 when it needs to be modified. The multiplexer 30 is controlled by an update CRTL signal selecting, for example in the active state (high or 1), the value of the first input and, at rest (low or 0) the output value of the register 22 .
    Furthermore, the INC increment value is also preferably configurable. For this, the output of register 27 is for example connected to a first input of a selector 31 (two-to-one multiplexer). A second input of the multiplexer 31 is intended to receive the value INC to be stored in the register 27 when it needs to be modified. The multiplexer 31 is, for example, controlled by the signal CRTL (or by a signal independent of the signal CTRL) selecting, for example in the active state (high or 1), the value of the first input and, at rest (low or 0) the output value of register 27. If the value INC is changed, this must also be initialized in register 25. For this, a selector 32, the output of which is connected to the input of register 25, receives the INC signal on a first input and the output of the selector 28 on a second input. The selector 32 is controlled for example by the signal CTRL to reload the new value INC in the register 25 at the same time as it is loaded in the register 27.
    FIGS. 3A, 3B, 3C and 3D illustrate, by timing diagrams, the operation of the unit 18 of FIG. 1. FIGS. 3A, 3B and 3C represent examples of respective shapes of the signals S, R and SI6. FIG. 3D represents an example of a current ramp generated by the module 12.
    It can be seen that the converter 16 generates a decreasing sawtooth ramp of period T with steps of width corresponding to the value of the increment INC (in number of clock strokes CK '). By using this ramp as a comparison reference (as threshold) for the comparator 14 (FIG. 1), the comparison voltage reference is lowered as the current ramp (FIG. 3D) increases, therefore that one advances in period T. Thus, if the voltage V (ILOAD), which is representative of the energy requirements of the load, becomes too high with the risk of causing a duty cycle of more than 50%, the fact that the comparison reference being lower decreases the amplitude of the difference presented at the input of module 12. This makes it possible to prevent the system from becoming unstable when the duty cycle exceeds 50%.
    The value of the INC increment conditions the number of steps of decrement of the voltage ramp supplied by the converter 16. According to a particular embodiment, between 4 and 50 steps are provided in a period T.
    The choice of the voltage increment step of the converter 16 depends on the application and, in particular, on the range of variation of the voltage V (ILOAD).
    The frequency of the clock CK ′ is, for example, equal to the frequency CK regulating the pulse width modulation step of the module 12 (FIG. 1).
    We took the example above of a signal SI 6 decreasing in a sawtooth fashion. However, according to other embodiments, the converter 16 can generate an increasing or triangular sawtooth signal. It depends on the structure of the downstream circuits (comparator 14 and module 12) and the slope compensation speed they need.
    An advantage of the embodiments described is that they avoid the instability of the pulse trains generated in the event of an increase in the duty cycle.
    Another advantage is that the solution is digital and particularly simple to implement.
    Another advantage is that the implementation of the described solution is compatible with the usual architectures for generating control signals in pulse width modulation. Indeed, this implementation only intervenes on the reference of the comparator 14 conditioning the width of the pulses.
    FIG. 4 is a block diagram of an embodiment of a programmable digital-analog converter 4.
    This generator can, for example, be used to make the converter 16 of FIG. 1 or form a programmable generator of a decreasing sawtooth signal.
    According to this embodiment, the converter comprises a digital stage 5 and an analog stage 6. Stage 5 is a programmable digital circuit intended to supply bits (signal B) in parallel at the input of the analog stage operating the conversion properly called. Stage 6 is a usual analog stage, for example consisting of a network of current sources individually controlled by the bits of signal B, of a switchable resistance network of input of an operational amplifier, etc.
    The binary word B, supplied at the input of stage 6, conditions the value of a voltage V supplied at the output of converter 4. The pitch (precision) of the converter depends on the number of bits of signal B.
    FIG. 5 represents, in the form of blocks, an embodiment of a digital stage 5 of the generator of FIG. 4, adapted to produce a programmable generator of a decreasing sawtooth signal. Stage 5 constitutes, according to the embodiment shown, a programmable stage comprising: a register 51 for storing a maximum value (INIT); a register 53 for storing a value (DEC) for decrementing the output word B, representing the step for decrementing the output word B; a calculation register 55 (BUFEER); an output register 57 intended to contain the word B (OUTPUT); and a subtractor 59 from the value of the decrement to the current value of the calculation register. Stage 5 receives a signal CLK for triggering a decrement of the value B and a reset signal RESET.
    The operation of stage 5 is as follows. At each edge (for example rising) of the signal CLK, the contents of the registers 55 and 53 are read and the value DEC is subtracted from the content read in the register 55. The result is stored in the calculation register 55. At each edge ( for example amount) of the RESET signal, the calculation register 55 and the output register 57 are reset to the value INIT read in the register 51. The content of the calculation register 55 is transferred, for example to each edge of the signal CLK, to the register 57. Thus, the register 57 contains, between two edges of the signal CLK, the value which was loaded at the first of the two edges in the subtractor 59, which is therefore greater by a value DEC than the content of the calculation register 55 .
    The converter 4 of FIG. 4 can be used as a programmable converter providing a given analog voltage. For this, we choose the number of decrements to apply to the maximum value.
    The generator 4 can also be used as a programmable generator of a sawtooth signal. Depending on the INIT and DEC values chosen, the decrement frequency and the maximum amplitude of the sawtooth signal are fixed for a given CLK clock.
    According to a preferred embodiment, the number of bits of the decrement 53 and calculation 55 registers is greater than the number of bits of registers 51 and 57. The bits of register 51 are used as most significant bits during the initialization of the computation register 55. The most significant bits of register 55 are used to update the output register 57. An advantage is that this avoids rounding errors since only the most significant bits are used. As a particular embodiment, the registers 51 and 57 are on twelve bits and the registers 53 and 55 are on sixteen bits.
    According to a particular embodiment, the signals RESET and CLK correspond respectively to the signals R and S generated by the circuit 2 (FIG. 2).
    Various embodiments have been described, various variants and modifications will appear to those skilled in the art. In particular, the choice of the values to be stored in the different registers and the choice of the frequencies of the trigger signals depend on the application and their determination is within the reach of the skilled person. In addition, the practical implementation of the embodiments and the dimensioning of the components are within the reach of those skilled in the art from the functional description given above.
    权利要求:
    Claims (9)
    [1" id="c-fr-0001]
    1. Unit (18) for slope compensation of a control signal of a module (12) for generating width modulated pulses, comprising: a digital-analog converter (16) for generating a tooth signal saw; and a circuit (2) for triggering the steps of the sawtooth signal and for resetting this signal, the sawtooth signal being reset at the rate (T) of a first frequency of said width modulated pulses.
    [2" id="c-fr-0002]
    2. Unit according to claim 1, wherein the trigger circuit (2) is a digital circuit.
    [3" id="c-fr-0003]
    3. Unit according to claim 2, wherein the trigger circuit (2) comprises: at least one counter (21) incremented at the rate of a second frequency (CK '), greater than a frequency (CK) of modulation of said pulses ; a first register (22) for storing a value representative of the period (T) of the first frequency; and a first comparator (23) from the value of the counter to the value of the first register, said first comparator providing a signal (R) for resetting the sawtooth signal.
    [4" id="c-fr-0004]
    4. Unit according to claim 3, in which the triggering circuit (2) further comprises: a second register (25) whose value is incremented (26), at the rate of the second frequency (CK '), by a value increment (INC); and a second comparator (24) from the value of said counter (21) to the value of the second register, said second comparator providing a signal (S) for triggering a step of the sawtooth signal.
    [5" id="c-fr-0005]
    5. Unit according to claim 4, in which the triggering circuit (2) comprises a third register (27) for storing the increment value.
    [6" id="c-fr-0006]
    6. Unit according to any one of claims 1 to 5, wherein the sawtooth signal (S16) has a decreasing slope.
    [7" id="c-fr-0007]
    7. Unit according to any one of claims 1 to 6, in which the sawtooth signal has an increasing slope.
    [8" id="c-fr-0008]
    8. A circuit for controlling a switch (K) of a switching power supply, comprising: a module (12) for generating control pulses of said switch; a comparator (14) for generating a trigger signal of said module from a comparison of information representative of the current level in an inductive element controlled by said switch with respect to a threshold; and a slope compensation unit (18) according to any of claims 1 to 7.
    [9" id="c-fr-0009]
    9. A switching power supply circuit comprising: a switch (K) for cutting an inductive energy transfer; and a control circuit according to claim 8.
    类似技术:
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    公开号 | 公开日
    CN108832798B|2020-09-18|
    CN208094463U|2018-11-13|
    FR3066060B1|2020-03-27|
    CN108832798A|2018-11-16|
    US20180323695A1|2018-11-08|
    US10298109B2|2019-05-21|
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    法律状态:
    2018-04-23| PLFP| Fee payment|Year of fee payment: 2 |
    2018-11-09| PLSC| Publication of the preliminary search report|Effective date: 20181109 |
    2019-04-19| PLFP| Fee payment|Year of fee payment: 3 |
    2020-04-22| PLFP| Fee payment|Year of fee payment: 4 |
    2022-02-11| ST| Notification of lapse|Effective date: 20220105 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1753897A|FR3066060B1|2017-05-03|2017-05-03|CUT-OFF POWER CONTROL|
    FR1753897|2017-05-03|FR1753897A| FR3066060B1|2017-05-03|2017-05-03|CUT-OFF POWER CONTROL|
    US15/949,690| US10298109B2|2017-05-03|2018-04-10|Switch-mode power supply control|
    CN201820560565.9U| CN208094463U|2017-05-03|2018-04-19|Circuit and switched-mode power supply circuit for slope compensation|
    CN201810353724.2A| CN108832798B|2017-05-03|2018-04-19|Switch mode power supply control|
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